1. Field of the Invention
The present invention generally relates to a system and method for testing a direct current (DC) isolation resistance of a large capacitance network, and more specifically to a system and method for testing a DC isolation resistance of a large capacitance network experiencing voltage stress such as those found on multilayer ceramic substrates, multilayer printed circuit boards, and similar products and devices.
2. Description of the Related Art
Large capacitance networks, such as those found when testing the voltage plane to voltage plane isolation in large multilayer ceramic substrates with multiple voltage and/or ground planes, must be tested after manufacturing has been completed. These large capacitance networks generally have an electrical specification that establishes a minimum standard for a satisfactory network under test. This electrical specification may include both a DC isolation resistance standard and a voltage stress standard. Typical values are on the order of 1 Megaohm for the resistance standard and 100 volts for the voltage stress standard. Testing the DC isolation resistance while the network under test is experiencing a voltage stress is, accordingly, a necessary test for some electrical networks.
Conventional systems that test a direct current isolation resistance fall into three major categories. The first type of conventional testing apparatus performs the isolation resistance test without regard to a voltage stress. Although this type of testing apparatus has the benefit of a relatively quick testing time, this type of testing apparatus entirely fails to address the voltage stress requirement. Accordingly, although testing apparatus that fail to apply a voltage stress may be relatively efficient with respect to time, this type of testing apparatus may fail to fully test whether a network fully satisfies its electrical specification.
The second type of conventional testing apparatus performs the isolation resistance test while the network under test is experiencing a voltage stress, but fails to allow the network to achieve a steady state. For example, a network may need X seconds to achieve a steady state, and this second type of testing apparatus may take a measurement after (0.05)X and estimate a final DC resistance value based on the results of the initial test. By way of specific example, for a testing apparatus of this type, a network may require 5 seconds to achieve a steady state when a 100 volts of stress is needed, and the isolation resistance may be measured at 200 ms. This test may be satisfactory when the capacitance of the network under test is relatively small and stable. FIG. 5 provides an output waveform from one measurement of isolation resistance of a 127 mm multilayer ceramic substrate with a network capacitance of 0.05 microfarads using a conventional test apparatus of this type in conjunction with an estimation method. However, current networks on large ceramic substrates, for example, may have variations of up to 50% in voltage plane capacitance not only from product to product, but also within a single product""s multiple voltage planes. This may cause flawed isolation resistance value determinations using the estimation of steady state resistance. Estimations will vary widely based on the capacitance of the network under test.
The third type of conventional testing apparatus performs the isolation resistance test while the network is experiencing voltage stress and after the network under test has achieved a steady state. Although this third type of conventional testing apparatus accurately measures isolation resistance of large capacitance networks while the networks are experiencing voltage stress, this type of testing device requires a relatively long duration to test a single network. For example, current 127 mm multilayer ceramic products with voltage plane capacitances in the range of 0.05 microfarads to 0.1 microfarads that need 100 volts of stress may require 5 seconds to achieve a steady state. Furthermore, conventional systems may require transferring the network under test to a special testing apparatus, which further increases the cycle time of the test.
In view of the above and other problems of the invention and systems and technologies, it is an object of the invention to provide a system and method for measuring an isolation resistance for large capacitance networks experiencing voltage stress.
It is a further object of the invention to provide a system and method for measuring an isolation resistance for large capacitance networks experiencing voltage stress with reduced test cycle time, reduced handling requirements, and/or increased accuracy.
According to one embodiment of the invention, these objects are achieved by a testing apparatus for determining whether the DC isolation resistance of a large capacitance network is greater than, equal to, or less than a minimum allowable isolation resistance of Rspec, the large capacitance network having a network capacitance of Cvp. This testing apparatus includes a voltage generator for supplying an input voltage, an external resistor or combination of resistances having a total resistance of Rin electrically connected to and removable from the large capacitance network, an external capacitor having a capacitance of Cbal electrically connected to and removable from the large capacitance network, wherein Rspec multiplied by Cvp is equal to Rin multiplied by Cbal, and an output waveform measuring device for measuring a linear slope of an output waveform, wherein a slope of the output waveform indicates whether the isolation resistance of the large capacitance network is greater than Rspec.
By adding the external capacitance and resistance to the large resistance network under test, the DC isolation resistance may be determined without distortion from the AC components of the circuit. The capacitance of the external capacitor is determined based on the capacitance of the network, the resistance of the network, and the resistance of the testing apparatus, as described in more detail below.
These objects may also be achieved in accordance with the present invention by a method for determining whether a DC isolation resistance Rvp of a large capacitance network is greater than, equal to, or less than a minimum allowable isolation resistance of Rspec, the large capacitance network having a network capacitance of Cvp. The method may include electrically connecting an external resistor having a resistance of Rin to the large capacitance network, electrically connecting an external capacitor having a capacitance of Cbal to the large capacitance network, wherein Rspec multiplied by Cvp is equal to Rin multiplied by Cbal, supplying an input voltage to the external resistor, the external capacitor, and the large capacitance network, measuring the output voltage, and determining whether the isolation resistance of the large capacitance network is greater than Rspec based on a slope of the output waveform.
In another embodiment of the present invention, an additional external capacitor (Clim) may be provided in order to obviate or swamp out fluctuations in the capacitance of the network. By adding Clim in parallel with Cvp and making Clim at least approximately ten times greater than the maximum Cvp for the type of network under test, the effect of Cvp on the output waveform is relatively small and generally does not influence whether the network under test satisfies its electrical specification. In this embodiment, the invention includes a voltage generator for supplying an input voltage, an external resistor having a resistance of Rin electrically connected to and removable from the large capacitance network, a swamp capacitor having a capacitance of Clim connected in parallel to Cvp, wherein Clim is at least approximately ten times greater than Cvp, an external capacitor having a capacitance of Cbal electrically connected to and removable from the large capacitance network, wherein Rspec multiplied by Clim is equal to Rin multiplied by Cbal, and an output waveform measuring device for measuring a linear slope of an output waveform, wherein a slope of the output waveform indicates whether Rvp is greater than Rspec.